S.06 SCHEDULING THE STREAM OF INSTRUCTIONS FOR CONVEYOR RISC ARCHITECTURES D.V. Kalashnikov, I.V. Mashechkin, ... In essence, IS is a rearrangement of instructions which does not violate the logic of the program and decreases the idle time of the conveyor. ... clients, is granted by Allerton Press, Inc. for libraries and other users registered with the Copyright Clearance Center ( CCC)anbsp;...
Title | : | Moscow University Computational Mathematics and Cybernetics |
Author | : | Moskovskiĭ gosudarstvennyĭ universitet im. M.V. Lomonosova |
Publisher | : | - 1999 |
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