IEEE Symposium on High-Performance Computer Architecture
Technical Committee on Computer Architecture ... We provide the results for both a 16 register and a 32 register processor, the smaller register file increases the number of scalar ... Figure 3 shows a block diagram of our framework. ... 1. aquot;Markaquot; Scalars Simple scalar 3.0 Processor LI Cache L2 Cache ARM ARM 10 32K None .
| Title | : | IEEE Symposium on High-Performance Computer Architecture |
| Author | : | IEEE Computer Society. Technical Committee on Computer Architecture |
| Publisher | : | IEEE - 2002 |
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